prjtrellis
Project Trellis enables a fully open-source flow for ECP5 FPGAs using Yosys for Verilog synthesis and nextpnr for place and route. Project Trellis itself provides the device database and tools for bitstream creation.
Installation
To install this package, run one of the following:
Usage Tracking
v1.0_176_gf93243b
1.4_66_g2dab009
1.4_64_g36c615d
1.4_45_gbe909ba
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About
Summary
Project Trellis enables a fully open-source flow for ECP5 FPGAs using Yosys for Verilog synthesis and nextpnr for place and route. Project Trellis itself provides the device database and tools for bitstream creation.
Last Updated
Feb 6, 2023 at 23:24
License
ISC
Total Downloads
75.6K
Supported Platforms
linux-64
macOS-64
Unsupported Platforms
win-64 Last supported version: 1.0_176_gf93243b