About Anaconda Help Download Anaconda

Project Trellis enables a fully open-source flow for ECP5 FPGAs using Yosys for Verilog synthesis and nextpnr for place and route. Project Trellis itself provides the device database and tools for bitstream creation.

Click on a badge to see how to embed it in your web page
badge
https://anaconda.org/litex-hub/prjtrellis/badges/version.svg
badge
https://anaconda.org/litex-hub/prjtrellis/badges/latest_release_date.svg
badge
https://anaconda.org/litex-hub/prjtrellis/badges/latest_release_relative_date.svg
badge
https://anaconda.org/litex-hub/prjtrellis/badges/platforms.svg
badge
https://anaconda.org/litex-hub/prjtrellis/badges/license.svg
badge
https://anaconda.org/litex-hub/prjtrellis/badges/downloads.svg

© 2024 Anaconda, Inc. All Rights Reserved. (v4.0.6) Legal | Privacy Policy