zachjs-sv2v
sv2v converts SystemVerilog (IEEE 1800-2017) to Verilog (IEEE 1364-2005), with an emphasis on supporting synthesizable language constructs.
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Summary
sv2v converts SystemVerilog (IEEE 1800-2017) to Verilog (IEEE 1364-2005), with an emphasis on supporting synthesizable language constructs.
Information Last Updated
Mar 25, 2025 at 16:25
License
BSD
Total Downloads
10.9K
Platforms
Linux 64 Version: 0.0.5_0025_ge9f9696