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zachjs-sv2v

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sv2v converts SystemVerilog (IEEE 1800-2017) to Verilog (IEEE 1364-2005), with an emphasis on supporting synthesizable language constructs.

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linux-64/zachjs-sv2v-0.0.7_3_g2a4d1cc-20210316_201220.tar.bz2

conda

0.0.7_3_g2a4d1cc

linux-64

main

Apr 8, 2021, 05:35 AM

1.4 MB

6

linux-64/zachjs-sv2v-0.0.7_2_g5ac7a79-20210316_201220.tar.bz2

conda

0.0.7_2_g5ac7a79

linux-64

main

Apr 7, 2021, 05:15 AM

1.4 MB

6

linux-64/zachjs-sv2v-0.0.6_44_gda07619-20210225_135318.tar.bz2

conda

0.0.6_44_gda07619

linux-64

main

Feb 25, 2021, 09:51 PM

1.39 MB

6

linux-64/zachjs-sv2v-0.0.6_44_gda07619-20210224_102348.tar.bz2

conda

0.0.6_44_gda07619

linux-64

main

Feb 25, 2021, 10:31 AM

1.4 MB

6